## +24 ## Cross-Platform Floating-Point Determinism Out of the Box ## SHERRY IGNATCHENKO ET AL ## Authors  ## All the 0c9de70c3d925/p2_4.jpg) Guy Davidson gd@6it.dev Advising on C++ standard with regards to floating-point, idea about intrinsics, reviews  Mykhailo Borovyk mbo@6it.dev Implementing fixed-point math with floating-point fallback  Vladyslav

## +24 ## A New Dragon in the Den: Fast Conversion From Floating-Point Numbers ## CASSIO NERI ## 2024 September 15 - 20 WARNING: This PDF poorly reproduces the slides shown at the talk. You are strongly seven-headed beast. It's not rocket science. ## A New Dragon in the Den ## Fast conversion from floating-point numbers ## Cassio Neri (Independent Researcher) CppCon 2024 - Aurora # Statistical mechanics Decimal fixed-point representation ## 1234 ## Decimal floating-point representation ## exponent ### 10 ¹ x 2.34 mantissa ## Decimal floating-point representation exponent ### 10 ¹ x 2.34 mantissa 0

assignment versus mutation 4.3 Stylistic Conventions 5 Integers and Floating-Point Numbers 5.1 Integers 5.2 Floating-Point Numbers 5.3 Arbitrary Precision Arithmetic 5.4 Numeric Literal Coefficients stylistic conventions, see the Style Guide. ## Chapter 5 ## I ntegers and Floating-Point Numbers Integers and floating-point values are the basic building blocks of arithmetic and computation. Built-in representations of integers and floating-point numbers as immediate values in code are known as numeric literals. For example, 1 is an integer literal, while 1.0 is a floating-point literal; their binary in-memory

both be mapped to 0 in the quantized domain. Keeping all that in mind, it is easy to see that floating-point $ x_{min} $ should map to 0, and $ x_{max} $ should map to $ 2^{b}-1 $ . How do we map the precision domain. Visually inspecting figure 2-4, can you work out the formula for mapping a given floating-point value (x) to a quantized value ( $ x_{q} $ ). Assume that you are given values of $ x_{min} [Image](/uploads/documents/5/f/8/a/5f8af6d4905642e38ad2d0bbe54cd375/p6_1.jpg) Figure 2-4: Quantizing floating-point continuous values to discrete unsigned values. The continuous values range from $ x_{min} $

td>RVPNErd,rs1,rs2Two Optional Floating-Point Instruction Extensions: RVF & RVDCategoryNameFmtRV32(F/D) body> RISC-V calling convention and five optional extensions: 8 RV32M; 11 RV32A; 34 floating-point instructions each for 32- and 64-bit data (RV32F, RV32D); and 53 RV32V. Using regex notation D. RV32 $ \{F|D\} $ adds registers f0-f31, whose width matches the widest precision, and a floating-point control and status register fcsr. RV32V adds vector registers v0-v31, vector predicate registers

Precisão Simples e Dupla 52 5.1 Introdução 52 5.2 Registradores de Ponto Flutuante 52 5.3 Floating-Point Loads, Stores, and Arithmetic 57 5.4 Conversão e Movimentação de Ponto Flutuante 58 5.5 Instruções e decimal128. ### 5.8 Para Saber Mais IEEE Standards Committee. 754-2008 IEEE standard for floating-point arithmetic. IEEE Computer Society Std, 2008. A. Waterman and K. Asanović, editors. The RISC-V |100|1|00000|00000|00000|10|| ### c.fld rd′, uimm(rs1′) f[8+rd'] = M[x[8+rs1'] + uimm][63:0] Floating-point Load Doubleword. RV32DC e RV64DC. Expande para fld rd, uimm(rs1), onde rd=8+rd' e rs1=8+rs1'

decimal128. ### 5.8 Para Aprender Más IEEE Standards Committee. 754-2008 IEEE standard for floating-point arithmetic. IEEE Computer Society Std, 2008. A. Waterman and K. Asanović, editors. The RISC-V antes que Moore publicara su ley. Sus arquitectos originalmente predijeron 1000 MFLOPS (Mega floating-point operations per second: millones de operaciones de punto flotante por segundo), pero el rendimiento |100|1|00000|00000|00000|10|| ### c.fld rd′, uimm(rs1′) f[8+rd'] = M[x[8+rs1'] + uimm][63:0] Floating-point Load Doubleword. RV32DC y RV64DC. Se extiende a fld rd, uimm(rs1), donde rd=8+rd' y rs1=8+rs1'

#RVPNErd,rs1,rs2Two Optional Floating-Point Instruction Extensions: RVF & RVDPredicate <RVPLTrd body> RISC-V calling convention and five optional extensions: 8 RV32M; 11 RV32A; 34 floating-point instructions each for 32- and 64-bit data (RV32F, RV32D); and 53 RV32V. Using regex notation D. RV32 $ \{F|D\} $ adds registers f0-f31, whose width matches the widest precision, and a floating-point control and status register fcsr. RV32V adds vector registers v0-v31, vector predicate registers

Conventions 9 4 Integers and Floating-Point Numbers 11 4.1 Integers 12 Overflow behavior 14 Division errors 15 4.2 Floating-Point Numbers 15 Floating-point zero 16 Special floating-point values 17 Machine epsilon information about stylistic conventions, see the Style Guide. Chapter 4 Integers and Floating-Point Numbers Integers and floating-point values are the basic building blocks of arithmetic and computation. Built-in representations of integers and floating-point numbers as immediate values in code are known as numeric literals. For example, 1 is an integer literal, while 1.0 is a floating-point literal; their binary in-memory

Conventions 9 4 Integers and Floating-Point Numbers 11 4.1 Integers 12 Overflow behavior 14 Division errors 15 4.2 Floating-Point Numbers 15 Floating-point zero 16 Special floating-point values 17 Machine epsilon information about stylistic conventions, see the Style Guide. Chapter 4 Integers and Floating-Point Numbers Integers and floating-point values are the basic building blocks of arithmetic and computation. Built-in representations of integers and floating-point numbers as immediate values in code are known as numeric literals. For example, 1 is an integer literal, while 1.0 is a floating-point literal; their binary in-memory