graph { "nodes": [ { "op": "null", "name": "data", "inputs": [] }, { "op": "tvm_op", "name": "xdnn0", "attrs": { "flatten_data": "0", "func_name": “accel_fused", "num_inputs": "1", "num_outputs": "fuse_flatten", "num_inputs": "1", "num_outputs": "1" }, "inputs": [[1, 0, 0]] }, >> 11 Calls XDNN’s TVM registered function to access the FPGA runtime APIs© Copyright 2018 Xilinx Registering TVM

Machine learning suite Ø AI inference IP: xDNN Ø AI development tools: xfDNN Ø 在云端的AI 应用，可以接受 python 语言进行部署，做数据预处理和后处理工作。 29 Python in Xilinx ML Framework xDNN CNN Processing Engine xfDNN Middleware

Machine learning suite Ø AI inference IP: xDNN Ø AI development tools: xfDNN Ø 在云端的AI 应用，可以接受 python 语言进行部署，做数据预处理和后处理工作。 29 Python in Xilinx ML Framework xDNN CNN Processing Engine xfDNN Middleware

Machine learning suite ➢ AI inference IP: xDNN ➢ AI development tools: xfDNN ➢ 在云端的AI 应用，可以接受 python 语言进行部署，做数据预处理和后处理工作。 29 Python in Xilinx ML Framework xDNN CNN Processing Engine xfDNN Middleware