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'virt' має PL011 UART, тож давайте напишемо для нього драйвер. const FLAG_REGISTER_OFFSET: usize = 0x18; const FR_BUSY: u8 = 1 << 3; const FR_TXFF: u8 = 1 << 5; /// Мінімальний драйвер для PL011 UART. драйвера UART для пристрою PL011 /// за заданою базовою адресою. /// /// # Безпека /// /// Задана базова адреса повинна вказувати на 8 керуючих регістрів MMIO пристрою /// PL011, які повинні бути відображені & FR_TXFF != 0 {} // БЕЗПЕКА: ми знаємо, що базова адреса вказує на регістри // керування пристрою PL011, які відповідним чином відображені. unsafe { // Записуємо в буфер TX. self.base_address.write_volatile(byte);

� � � � � . 53.4 � � � � � � � � � � � � � � UART � � � � � � � � � � � � � � � QEMU 'virt ' � � PL011 � � � � � � � UART � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � . const << 5 ; / / / Minimal driver for a PL011 UART . pub struct Uart } base_address: *mut u8 , { impl Uart } / / / Constructs a new instance of the UART driver for a PL011 device at the / / / given base Safety / / / / / / The given base address must point to the 8 MMIO control registers of a / / / PL011 device, which must be mapped into the address space of the process / / / as device memory and not

machine has a PL011 UART, so let's write a driver for that. const FLAG_REGISTER_OFFSET: usize = 0x18; const FR_BUSY: u8 = 1 << 3; const FR_TXFF: u8 = 1 << 5; /// Minimal driver for a PL011 UART. 287 instance of the UART driver for a PL011 device at the /// given base address. /// /// # Safety /// /// The given base address must point to the 8 MMIO control registers of a /// PL011 device, which must be mapped & FR_TXFF != 0 {} // SAFETY: We know that the base address points to the control // registers of a PL011 device which is appropriately mapped. unsafe { // Write to the TX buffer. self.base_address.write_volatile(byte);

编写 UART 驱动程序 QEMU“虚拟机”具有 PL011 UART，现在为其编写驱动程序。 const FLAG_REGISTER_OFFSET: usize = 0x18; const FR_BUSY: u8 = 1 << 3; const FR_TXFF: u8 = 1 << 5; /// Minimal driver for a PL011 UART. pub struct Uart instance of the UART driver for a PL011 device at the /// given base address. /// /// # Safety /// /// The given base address must point to the 8 MMIO control registers of a /// PL011 device, which must be mapped & FR_TXFF != 0 {} // SAFETY: We know that the base address points to the control // registers of a PL011 device which is appropriately mapped. unsafe { // Write to the TX buffer. self.base_address.write_volatile(byte);

estructura. 290 53.4 Vamos a escribir un controlador de UART La máquina ”virt” de QEMU tiene una UART [PL011]https://developer.arm.com/documentation/ddi0183/g), así que vamos a escribir un controlador para Controlador mínimo para un UART PL011. pub struct Uart { base_address: *mut u8, } impl Uart { /// Construye una instancia nueva del controlador de UART para un dispositivo PL011 en la /// dirección base Seguridad /// /// La dirección base debe apuntar a los 8 registros de control MMIO de un /// dispositivo PL011, que debe asignarse al espacio de direcciones del proceso /// como memoria del dispositivo y no

um UART PL011, então vamos escrever um driver para isso. 291 const FLAG_REGISTER_OFFSET: usize = 0x18; const FR_BUSY: u8 = 1 << 3; const FR_TXFF: u8 = 1 << 5; /// Driver mínimo para um UART PL011. pub um dispositivo PL011 no endereço /// base fornecido. /// /// # Segurança /// /// O endereço base fornecido deve apontar para os 8 registradores de controle MMIO de um /// dispositivo PL011, que deve ser SEGURANÇA: porque sabemos que o endereço base aponta para o controle // registradores de um dispositivo PL011 que está mapeado adequadamente. unsafe { // Escreva no buffer TX. self.base_address.write_volatile(byte);

驅動程式 QEMU 'virt' 機器搭載 PL011 UART，所以我們要為此編寫驅動程式。 const FLAG_REGISTER_OFFSET: usize = 0x18; const FR_BUSY: u8 = 1 << 3; const FR_TXFF: u8 = 1 << 5; /// Minimal driver for a PL011 UART. pub struct Uart instance of the UART driver for a PL011 device at the /// given base address. /// /// # Safety /// /// The given base address must point to the 8 MMIO control registers of a /// PL011 device, which must be mapped FR_TXFF != 0 {} // Safe because we know that the base address points to the control // registers of a PL011 device which is appropriately mapped. unsafe { // Write to the TX buffer. self.base_address.write_volatile(byte);

드라이버작성 QEMU 의 'virt' 보드에는 PL011 UART 가있으므로 이를 위한 드라이버를 작성해 보겠습니다. const FLAG_REGISTER_OFFSET: usize = 0x18; const FR_BUSY: u8 = 1 << 3; const FR_TXFF: u8 = 1 << 5; /// PL011 UART 의 최소 드라이버입니다. pub struct { base_address: *mut u8, } impl Uart { /// 지정된 기본 주소에 PL011 기기에 대한 UART 드라이버의 새 인스턴스를 /// 생성합니다. 275 /// /// # 안전 /// /// 지정된 기본 주소는 PL011 기기의 /// MMIO 제어 레지스터 8 개를 가리켜야 하며, /// 이는 프로세스의 주소 공간에 // TX 버퍼에 공간이 확보될 때까지 기다립니다. while self.read_flag_register() & FR_TXFF != 0 {} // 기본 주소가 적절하게 매핑된 PL011 기기의 제어 레지스터를 // 가리키고 있으므로 안전합니다. unsafe { // TX 버퍼에 씁니다. self.base_address.write_volatile(byte);

ドライバを書いてみましょう QEMU の'virt' マシンには PL011 という UART があるので、それに対するドライバを書いてみましょ う。 const FLAG_REGISTER_OFFSET: usize = 0x18; const FR_BUSY: u8 = 1 << 3; const FR_TXFF: u8 = 1 << 5; /// PL011 UART の最小ドライバ。 pub struct base_address: *mut u8, } impl Uart { /// 指定されたベースアドレスに存在する /// PL011 デバイス用の UART ドライバの新しいインスタンスを作成します。 /// /// # 安全性 /// /// 指定されたベースアドレスは PL011 デバイスの 8 つの MMIO 制御レジスタを指していなければなりません。 /// これらはデバイスメモリとしてプロセスのアドレス空間に & FR_TXFF != 0 {} // SAFETY: We know that the base address points to the control // registers of a PL011 device which is appropriately mapped. unsafe { // TX バッファに書き込みます。 self.base_address.write_volatile(byte);